Embedded Hardware: Know It All, 1st Edition

Readership

Embedded and hardware engineers; designers, project managers

Embedded Hardware: Know It All, 1st Edition

CHAPTER 1: Embedded Hardware Basics
1.1 Lesson One on Hardware: Reading Schematics
1.2 The Embedded Board and the von Neumann Model
1.3 Powering the Hardware
1.4 Basic Electronics
1.4.1 DC Circuits
1.4.2 AC Circuits
1.4.3 Active Devices
1.5 Putting It Together: A Power Supply
1.6 Endnotes


CHAPTER 2: Logic Circuits
2.1 Coding
2.1.1 BCD
2.2 Combinatorial Logic
2.2.1 NOT Gate
2.2.2 AND and NAND Gates
2.2.3 OR and NOR Gates
2.2.4 XOR
2.2.5 Circuits
2.2.6 Tristate Devices
2.3 Sequential Logic
2.3.1 Logic Wrap-Up
2.4 Putting It All Together: The Integrated Circuit
2.5 Endnotes

CHAPTER 3: Embedded Processors
3.2 ISA Architecture Models
3.2.1 Operations
3.2.2 Operands
3.2.3 Storage
3.2.4 Addressing Modes
3.2.5 Interrupts and Exception Handling
3.2.6 Application-Specific ISA Models
3.2.7 General-Purpose ISA Models
3.2.8 Instruction-Level Parallelism ISA Models
3.3 Internal Processor Design
3.3.1 Central Processing Unit (CPU)
3.3.2 On-Chip Memory
3.3.3 Processor Input/Output (I/O)
3.3.4 Processor Buses
3.4 Processor Performance
3.4.1 Benchmarks
3.5 Endnotes

CHAPTER 4: Embedded Board Buses and I/O
4.1 Board I/O
4.2 Managing Data: Serial vs. Parallel I/O
4.2.1 Serial I/O Example 1: Networking and Communications: RS-232
4.2.2 Example: Motorola/Freescale MPC823 FADS Board RS-232 System Model
4.2.3 Serial I/O Example 2: Networking and Communications: IEEE 802.11 Wireless LAN
4.2.4 Parallel I/O
4.2.5 Parallel I/O Example 3: “ Parallel” Output and Graphics I/O
4.2.6 Parallel and Serial I/O Example 4: Networking and Communications— Ethernet
4.2.7 Example 1: Motorola/Freescale MPC823 FADS Board Ethernet System Model
4.2.8 Example 2: Net Silicon ARM7 (6127001) Development Board Ethernet System Model
4.2.9 Example 3: Adastra Neptune x86 Board Ethernet System Model
4.3 Interfacing the I/O Components
4.3.1 Interfacing the I/O Device with the Embedded Board
4.3.2 Interfacing an I/O Controller and the Master CPU
4.4 I/O and Performance
4.5 Board Buses
4.6 Bus Arbitration and Timing
4.6.1 Nonexpandable Bus: I2C Bus Example
4.6.2 PCI (Peripheral Component Interconnect) Bus Example: Expandable
4.7 Integrating the Bus with Other Board Components
4.8 Bus Performance
4.9 Endnotes

CHAPTER 5: Memory Systems
5.1 Introduction
5.2 Memory Spaces
5.2.1 L1 Instruction Memory
5.2.2 Using L1 Instruction Memory for Data Placement
5.2.3 L1 Data Memory
5.3 Cache Overview
5.3.1 What Is Cache?
5.3.2 Direct-Mapped Cache
5.3.3 Fully Associative Cache
5.3.4 N-Way Set-Associative Cache
5.3.5 More Cache Details
5.3.6 Write-Through and Write-Back Data Cache
5.4 External Memory
5.4.1 Synchronous Memory
5.4.2 Asynchronous Memory
5.4.3 Nonvolatile Memories
5.5 Direct Memory Access
5.5.1 DMA Controller Overview
5.5.2 More on the DMA Controller
5.5.3 Programming the DMA Controller
5.5.4 DMA Classifications
5.5.5 Register-Based DMA
5.5.6 Descriptor-Based DMA
5.5.7 Advanced DMA Features
5.6 Endnotes

CHAPTER 6: Timing Analysis in Embedded Systems
6.1 Introduction
6.2 Timing Diagram Notation Conventions
6.2.1 Rise and Fall Times
6.2.2 Propagation Delays
6.2.3 Setup and Hold Time
6.2.4 Tri-State Bus Interfacing
6.2.5 Pulse Width and Clock Frequency
6.3 Fan-Out and Loading Analysis: DC and AC
6.3.1 Calculating Wiring Capacitance
6.3.2 Fan-Out When CMOS Drives LSTTL
6.3.3 Transmission-Line Effects
6.3.4 Ground Bounce
6.4 Logic Family IC Characteristics and Interfacing
6.4.1 Interfacing TTL Compatible Signals to 5 V CMOS
6.5 Design Example: Noise Margin Analysis Spreadsheet
6.6 Worst-Case Timing Analysis Example
6.7 Endnotes

CHAPTER 7: Chooosing a Microcontroller and Other Design Decisions
7.1 Introduction
7.2 Choosing the Right Core
7.3 Building Custom Peripherals with FPGAs
7.4 Whose Development Hardware to Use—Chicken or Egg?
7.5 Recommended Laboratory Equipment
7.6 Development Toolchains
7.7 Free Embedded Operating Systems
7.8 GNU and You: How Using “Free” Software Affects Your Product

CHAPTER 8:The Essence of Microcontroller Networking: RS-232
8.1 Introduction
8.2 Some History
8.3 RS-232 Standard Operating Procedure
8.4 RS-232 Voltage Conversion Considerations
8.5 Implementing RS-232 with a Microcontroller
8.5.1 Basic RS-232 Hardware
8.5.2 Building a Simple Microcontroller RS-232 Transceiver
8.6 Writing RS-232 Microcontroller Routines in BASIC
8.7 Building Some RS-232 Communications Hardware
8.7.1 A Few More BASIC RS-232 Instructions
8.8 I2C: The Other Serial Protocol
8.8.1 Why Use I²C?
8.8.2 The I²C Bus
8.8.3 I²C ACKS and NAKS
8.8.4 More on Arbitration and Clock Synchronization
8.8.5 I²C Addressing
8.8.6 Some I²C Firmware
8.8.7 The AVR Master I²C Code
8.8.8 The AVR I²C Master-Receiver Mode Code
8.8.9 The PIC I²C Slave-Transmitter Mode Code
8.8.10 The AVR-to-PIC I²C Communications Ball
8.9 Communication Options
8.9.1 The Serial Peripheral Interface Port
8.9.2 The Controller Area Network
8.9.3 Acceptance Filters
8.10 Endnotes

CHAPTER 9: Interfacing to Sensors and Actuators
9.1 Introduction
9.2 Digital Interfacing
9.2.1 Mixing 3.3 and 5 V Devices
9.2.2 Protecting Digital Inputs
9.2.3 Expanding Digital Inputs
9.2.4 Expanding Digital Outputs
9.3 High-Current Outputs
9.3.1 BJT-Based Drivers
9.3.2 MOSFETs
9.3.3 Electromechanical Relays
9.3.4 Solid-State Relays
9.4 CPLDs and FPGAs
9.5 Analog Interfacing: An Overview
9.5.1 ADCs
9.5.2 Project 1: Characterizing an Analog Channel
9.6 Conclusion
9.7 Endnotes

CHAPTER 10: Other Useful Hardware Design Tips and Techniques
10.1 Introduction
10.2 Diagnostics
10.3 Connecting Tools
10.4 Other Thoughts
10.5 Construction Methods
10.5.1 Power and Ground Planes
10.5.2 Ground Problems
10.6 Electromagnetic Compatibility
10.7 Electrostatic Discharge Effects
10.7.1 Fault Tolerance
10.8 Hardware Development Tools
10.8.1 Instrumentation Issues
10.9 Software Development Tools
10.10 Other Specialized Design Considerations
10.10.1 Thermal Analysis and Design
10.10.2 Battery-Powered System Design Considerations
10.11 Processor Performance Metrics
10.11.1 IPS
10.11.2 OPS
10.11.3 Benchmarks

APPENDIX A: Schematic Symbols

APPENDIX B: Acronyms and Abbreviations

APPENDIX C: PC Board Design Issues
C.1 Introduction
C.2 Resistance of Conductors
C.3 Voltage Drop in Signal Leads—“Kelvin” Feedback
C.4 Signal Return Currents
C.5 Grounding in Mixed Analog/Digital Systems
C.6 Ground and Power Planes
C.7 Double-Sided versus Multilayer Printed Circuit Boards
C.8 Multicard Mixed-Signal Systems
C.9 Separating Analog and Digital Grounds
C.10 Grounding and Decoupling Mixed-Signal ICs with Low Digital Currents
C.11 Treat the ADC Digital Outputs with Care
C.12 Sampling Clock Considerations
C.13 The Origins of the Confusion About Mixed-Signal Grounding: Applying Single-Card Grounding Concepts to Multicard Systems
C.14 Summary: Grounding Mixed-Signal Devices with Low Digital Currents in a Multicard System
C.15 Summary: Grounding Mixed-Signal Devices with High Digital Currents in a Multicard System
C.16 Grounding DSPs with Internal Phase-Locked Loops
C.17 Grounding Summary
C.16 Some General PC Board Layout Guidelines for Mixed-Signal Systems
C.19 Skin Effect
C.20 Transmission Lines
C.21 Be Careful with Ground Plane Breaks
C.22 Ground Isolation Techniques
C.23 Static PCB Effects
C.24 Sample MINIDIP and SOIC Op Amp PCB Guard Layouts
C.25 Dynamic PCB Effects
C.26 Stray Capacitance
C.27 Capacitive Noise and Faraday Shields
C.28 The Floating Shield Problem
C.29 Buffering ADCs Against Logic Noise
C.28 Endnotes