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High Performance Parallelism Pearls Volume Two
Multicore and Many-core Programming Approaches
1st Edition - July 23, 2015
Authors: Jim Jeffers, James Reinders
Language: English
Paperback ISBN:9780128038192
9 7 8 - 0 - 1 2 - 8 0 3 8 1 9 - 2
eBook ISBN:9780128038901
9 7 8 - 0 - 1 2 - 8 0 3 8 9 0 - 1
High Performance Parallelism Pearls Volume 2 offers another set of examples that demonstrate how to leverage parallelism. Similar to Volume 1, the techniques included here expl…Read more
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High Performance Parallelism Pearls Volume 2 offers another set of examples that demonstrate how to leverage parallelism. Similar to Volume 1, the techniques included here explain how to use processors and coprocessors with the same programming – illustrating the most effective ways to combine Xeon Phi coprocessors with Xeon and other multicore processors. The book includes examples of successful programming efforts, drawn from across industries and domains such as biomed, genetics, finance, manufacturing, imaging, and more. Each chapter in this edited work includes detailed explanations of the programming techniques used, while showing high performance results on both Intel Xeon Phi coprocessors and multicore processors. Learn from dozens of new examples and case studies illustrating "success stories" demonstrating not just the features of Xeon-powered systems, but also how to leverage parallelism across these heterogeneous systems.
Promotes write-once, run-anywhere coding, showing how to code for high performance on multicore processors and Xeon Phi
Examples from multiple vertical domains illustrating real-world use of Xeon Phi coprocessors
Source code available for download to facilitate further exploration
computer engineers in high-performance computing and system developers in vertical domains hoping to leverage HPC
Chapter 25: Power Analysis for Applications and Data Centers
Abstract
Introduction to measuring and saving power
Application: Power measurement and analysis
Data center: Interpretation via waterfall power data charts
Summary
Author Index
Subject Index
No. of pages: 592
Language: English
Edition: 1
Published: July 23, 2015
Imprint: Morgan Kaufmann
Paperback ISBN: 9780128038192
eBook ISBN: 9780128038901
JJ
Jim Jeffers
Jim Jeffers was the primary strategic planner and one of the first full-time employees on the program that became Intel ® MIC. He served as lead SW Engineering Manager on the program and formed and launched the SW development team. As the program evolved, he became the workloads (applications) and SW performance team manager. He has some of the deepest insight into the market, architecture and programming usages of the MIC product line. He has been a developer and development manager for embedded and high performance systems for close to 30 years.
Affiliations and expertise
Principal Engineer, Engineering Manager, Technical Computing, Intel Corporation, New Hope, PA, USA
JR
James Reinders
James Reinders is a senior engineer who joined Intel Corporation in 1989 and has contributed to projects including the world’s first TeraFLOP supercomputer (ASCI Red), as well as compilers and architecture work for a number of Intel processors and parallel systems. James has been a driver behind the development of Intel as a major provider of software development products, and serves as their chief software evangelist. James has published numerous articles, contributed to several books and is widely interviewed on parallelism. James has managed software development groups, customer service and consulting teams, business development and marketing teams. James is sought after to keynote on parallel programming, and is the author/co-author of three books currently in print including Structured Parallel Programming, published by Morgan Kaufmann in 2012.
Affiliations and expertise
Director and Programming Model Architect, Intel Corporation
Read High Performance Parallelism Pearls Volume Two on ScienceDirect