»
The Definitive Guide to the ARM Cortex-M0
 
 

The Definitive Guide to the ARM Cortex-M0, 1st Edition

 
The Definitive Guide to the ARM Cortex-M0, 1st Edition,Joseph Yiu,ISBN9780123854773
 
 
Up to
25%
off
 

  

Newnes

9780123854773

9780123854780

552

240 X 197

Gain expertise and insight into how to develop applications using the new ARM CORTEX-M0 microcontroller architecture, from a leading engineer at ARM who was involved in its development

Print Book + eBook

USD 68.94
USD 114.90

Buy both together and save 40%

Print Book

Paperback

In Stock

Estimated Delivery Time
USD 44.21
USD 58.95

eBook
eBook Overview

VST format:

DRM Free included formats: EPub, Mobi, PDF

USD 41.96
USD 55.95
Add to Cart
 
 

Key Features

  • The first and definitive book on the new ARM Cortex-M0 architecture targeting the large 8-bit and 16-bit microcontroller market
  • Explains the Cortex-M0 architecture and how to program it using practical examples
  • Written by an engineer at ARM who was heavily involved in its development

Description

The Definitive Guide to the ARM Cortex-M0 is a guide for users of ARM Cortex-M0 microcontrollers. It presents many examples to make it easy for novice embedded-software developers to use the full 32-bit ARM Cortex-M0 processor. It provides an overview of ARM and ARM processors and discusses the benefits of ARM Cortex-M0 over 8-bit or 16-bit devices in terms of energy efficiency, code density, and ease of use, as well as their features and applications. The book describes the architecture of the Cortex-M0 processor and the programmers model, as well as Cortex-M0 programming and instruction set and how these instructions are used to carry out various operations. Furthermore, it considers how the memory architecture of the Cortex-M0 processor affects software development; Nested Vectored Interrupt Controller (NVIC) and the features it supports, including flexible interrupt management, nested interrupt support, vectored exception entry, and interrupt masking; and Cortex-M0 features that target the embedded operating system. It also explains how to develop simple applications on the Cortex-M0, how to program the Cortex-M0 microcontrollers in assembly and mixed-assembly languages, and how the low-power features of the Cortex-M0 processor are used in programming. Finally, it describes a number of ARM Cortex-M0 products, such as microcontrollers, development boards, starter kits, and development suites. This book will be useful to both new and advanced users of ARM Cortex devices, from students and hobbyists to researchers, professional embedded- software developers, electronic enthusiasts, and even semiconductor product designers.

Readership

Embedded software developers, Embedded Product Designers, Students taking an
embedded systems design course where the Arm Cortex- M0 is used, electronics
hobbyists.

Joseph Yiu

Joseph Yiu has been working in ARM for over 12 years and has been involved in a wide range of projects including development of ARM Cortex-M processors and various on-chip system level and debug components. In addition to in depth knowledge of the processors and microcontroller system design, Joseph also has extensive knowledge in related areas including software development for the ARM Cortex-M microcontrollers, FPGA development and System-on-Chip design technologies.

Affiliations and Expertise

Senior Embedded Technology Specialist, ARM Ltd., Cambridge, UK

View additional works by Joseph Yiu

The Definitive Guide to the ARM Cortex-M0, 1st Edition


Foreword

Preface

Acknowledgments

Conventions

terms and Abbreviations

Chapter 1 Introduction

    Why Cortex-M0?

         Energy Efficiency

         Code Density

         Ease of Use

    Application of the Cortex-M0 Processors

    Background of ARM and ARM processors

    Cortex-M0 Processor Specification and ARM Architecture

    ARM Processors and the ARM Ecosystem

    Getting Started with the Cortex-M0 Processor

    Organization of This Book and Resources

Chapter 2 Cortex-M0 Technical Overview

    General Information on the Cortex-M0 Processor

    The ARM Cortex-M0 Processor Features

         System Features

         Implementation Features

         Debug Features

         Others

    Advantages of the Cortex-M0 Processor

         Energy Efficiency

         Limitations in 8-Bit and 16-Bit Architectures

         Easy to Use, Software Portability

         Wide Range of Choices

    Low-Power Applications

         Small Gate Count

         High Efficiency

         Low-Power Features

         Logic Cell Enhancement

    Cortex-M0 Software Portability

Chapter 3 Architecture

    Overview

    Programmer’s Model

         Operation Modes and States

         Registers and Special Registers

         R0?R12

         R13, Stack Pointer (SP)

         R14, Link Register (LR)

         R15, Program Counter (PC)

         xPSR, Combined Program Status Register

         Behaviors of the Application Program Status Register (APSR)

         PRIMASK: Interrupt Mask Special Register

         CONTROL: Special Register

    Memory System Overview

    Stack Memory Operations

    Exceptions and Interrupts

    Nested Vectored Interrupt Controller (NVIC)

         Flexible Interrupt Management

         Nested Interrupt Support

         Vectored Exception Entry

         Interrupt Masking

    System Control Block (SCB)

         Debug System

    Program Image and Startup Sequence

Chapter 4 Introduction to Cortex-M0 Programming

    Introduction to Embedded System Programming

         What Happens When a Microcontroller Starts?

         Designing Embedded Programs

    Inputs and Outputs

    Development Flow

    C Programming and Assembly Programming

    What Is in a Program Image?

         Vector Table

         C Startup Code

         Program Code

         C Library Code

         Data in RAM

    C Programming: Data Types

    Accessing Peripherals in C

    Cortex Microcontroller Software Interface Standard (CMSIS)

         Introduction of CMSIS

         What Is Standardized in CMSIS

         Organization of the CMSIS

         Using CMSIS

    Benefits of CMSIS

Chapter 5 Instruction Set

    Background of ARM and Thumb Instruction Set

    Assembly Basics

         Quick Glance at Assembly Syntax

         Use of a Suffix

         Thumb Code and Unified Assembler Language (UAL)

         Instruction List

         Moving Data within the Processor

         Memory Accesses

         Stack Memory Accesses

         Arithmetic Operations

         Logic Operations

         Shift and Rotate Operations

         Extend and Reverse Ordering Operations

         Program Flow Control

         Memory Barrier Instructions

         Exception-Related Instructions

         Sleep Mode Feature?Related Instructions

         Other Instructions

    Pseudo Instructions

Chapter 6 Instruction Usage Examples

    Overview

    Program Control

         If-Then-Else

         Loop

         More on the Branch Instructions

         Typical Usages of Branch Conditions

         Function Calls and Function Returns

         Branch Table

    Data Accesses

         Simple Data Accesses

         Example of Using Memory Access Instruction

    Data Type Conversion

         Conversion of Data Size

         Endian Conversion

    Data Processing

         64-Bit/128-Bit Add

         64-Bit/128-Bit Sub

         Integer Divide

         Unsigned Integer Square Root

         Bit and Bit Field Computations

Chapter 7 Memory System

    Overview

    Memory Map

         Code Region (0x00000000e0x1FFFFFFF)

         SRAM Region (0x20000000e0x3FFFFFFF)

         Peripheral Region (0x40000000e0x5FFFFFFF)

         RAM Region (0x60000000e0x9FFFFFFF)

         Device Region (0xA0000000e0xDFFFFFFF)

         Internal Private Peripheral Bus (PPB) (0xE0000000e0xE00FFFFF)

         Reserved Memory Space (0xE0100000e0xFFFFFFFF)

    Program Memory, Boot Loader, and Memory Remapping

    Data Memory

    Little Endian and Big Endian Support

         Data Type

         Effect of Hardware Behavior to Programming

         Data Alignment

         Access to Invalid Addresses

         Use of Multiple Load and Store Instructions

    Memory Attributes

Chapter 8 Exceptions and Interrupts

    What Are Exceptions and Interrupts?

    Exception Types on the Cortex-M0 Processor

         Nonmaskable Interrupt (NMI)

         Hard Fault

         SVCall (SuperVisor Call)

         PendSV (Pendable Service Call)

         SysTick

         Interrupts

    Exception Priority Definition

    Vector Table

    Exception Sequence Overview

         Acceptance of Exception Request

         Stacking and Unstacking

         Exception Return Instruction

         Tail Chaining

         Late Arrival

    EXC_RETURN

    Details of Exception Entry Sequence

         Stacking

         Vector Fetch and Update PC

         Registers Update

    Details of Exception Exit Sequence

         Unstacking of Registers

         Fetch and Execute from Return Address

Chapter 9 Interrupt Control and System Control

    Overview of the NVIC and System Control Block Features

    Interrupt Enable and Clear Enable

    Interrupt Pending and Clear Pending

    Interrupt Priority Level

    Generic Assembly Code for Interrupt Control

         Enable and Disable Interrupts

         Set and Clear Interrupt Pending Status

         Setting up Interrupt Priority Level

    Exception Masking Register (PRIMASK)

    Interrupt Inputs and Pending Behavior

         Simple Interrupt Process

    Interrupt Latency

    Control Registers for System Exceptions

    System Control Registers

         CPU ID Base Register

         Application Interrupt and Reset Control Register

         Configuration and Control Register

Chapter 10 Operating System Support Features

    Overview of the OS Support Features

         Why Use an Embedded OS?

    The SysTick Timer

    SysTick Registers

         Setting up SysTick

         Using SysTick Timer for Timing Measurement

    Process Stack and Process Stack Pointer

    SVC

    PendSV

Chapter 11 Low-Power Features

    Low-Power Embedded System Overview

    Low-Power Advantages of the Cortex-M0 Processor

    Overview of the Low-Power Features

    Sleep Modes

    Wait-for-Event (WFE) and Wait-for-Interrupt (WFI)

         Wait for Event (WFE)

         Wait for Interrupt (WFI)

         Wakeup Conditions

    Sleep-on-Exit Feature

    Wakeup Interrupt Controller

Chapter 12 Fault Handling

    Fault Exception Overview

         What Can Cause a Fault?

    Analyze a Fault

    Accidental Switching to ARM State

    Error Handling in Real Applications

    Lockup

         Causes of Lockup

         What Happens during a Lockup?

    Preventing Lockup

Chapter 13 Debug Features

    Software Development and Debug Features

    Debug Features Overview

    Debug Interface

    Halt Mode and Debug Events

    Debug System

Chapter 14 Getting Started with Keil MDK

    Introduction to Keil MDK

    First Step of Using Keil MDK

         Create the Blinky Project

         Create the Project Code

         Project Settings

         Compile and Build the Program

         Using the Debugger

    Other Project Configurations

         Target, Source Groups

         Compiler and Code-Generation Options

         Simulator

         Execution in RAM

    Customizing the Startup Code in Keil

    Using the Scatter Loading Feature in Keil

Chapter 15 Simple Application Programming

    Using CMSIS

    Using the SysTick Timer as a Single Shot Timer

    UART Examples

         Simple Input/Output

         Retargeting

         Developing Your Own Input and Output Functions

    Simple Interrupt Programming

         General Overview of Interrupt Programming

         Dial Control Interface Example

         Interrupt Control Functions

    Different Versions of CMSIS

Chapter 16 Assembly Projects and Mixed-Assembly and C Projects

    Project Development in Assembly

    Recommended Practice in Assembly Programming

    Structure of an Assembly Function

    Simple Assembly Project Example

    Allocating Data Space for Variables

    UART Example in Assembly

    Additional Text Output Functions

         Complex Branch Handling

    Mixed-Language Projects

         Calling a C Function from Assembly

         Calling an Assembly Function from C Code

    Embedded Assembly

    Accessing Special Instructions

    Idiom Recognitions

Chapter 17 Using Low-Power Features in Programming

    Overview

    Review of Sleep Modes in the Cortex-M0 Processor

    Using WFE and WFI in Programming

    Using the Send-Event-on-Pend Feature

    Using the Sleep-on-Exit Feature

    Wakeup Interrupt Controller (WIC) Feature

    Event Communication Interface

    Developing Low-Power Applications

    Example of Using Low-Power Features on the LPC111x

Chapter 18 Using SVC, PendSV, and Keil RTX Kernel

    Introduction

    Using the SVC Exception

    Using the PendSV Exception

    Using an Embedded OS

    Keil RTX Real-Time Kernel

         Features Overview

    OS Startup Sequence

         Simple OS Example

         Intertask Communications

         Event Communications

         Mutual Exclusive

         Semaphore

         Mailbox Messages

         Periodic Time interval

         Other RTX Features

         Application Example

Chapter 19 Getting Started with the ARM RealView Development Suite

    Overview

    Simple Application Example

    Using the Scatter Loading File

    Example with Vector Table in C

    Using MicroLIB in RVDS

    Using Assembly for Application Development in RVDS

    Flash Programming

    Debugging Using RealView Debugger

    Using Serial Wire Debug with the RealView Debugger

    Retargeting in RVDS

Chapter 20 Getting Started with the GNU C Compiler

    Overview

    Typical Development Flow

    Simple C Application Development

    CodeSourcery Common Startup Code Sequence (CS3)

    Using a User-Defined Vector Table

    Using Printf in gcc

    Inline Assembler

    SVC Example in gcc

    Hard Fault Handler Example

    Flash Programming and Debug

Chapter 21 Software Porting

    Overview

    ARM Processors

    Differences between the ARM7TDMI and the Cortex-M0

         Operation Mode

         Registers

         Instruction Set

         Interrupts

    Porting Software from the ARM7TDMI to the Cortex-M0

         Startup Code and Vector Table

         Interrupt

         C Program Code

         Assembly Code

         Atomic Access

         Optimizations

    Differences between the Cortex-M1 and the Cortex-M0

         Instruction Set

         NVIC

         System-Level Features

    Porting Software between the Cortex-M0 and the Cortex-M1

    Differences between the Cortex-M3 and the Cortex-M0

         Programmer’s Model

         NVIC and Exceptions

         Instruction Set

         System-Level Features

         Debug Features

    Porting Software between the Cortex-M0 and the Cortex-M3

    Porting Software between the Cortex-M0 and the Cortex-M4 Processor

    Porting Software from 8-Bit/16-Bit Microcontrollers to the Cortex-M0

         Common Modifications

         Memory Requirements

         Nonapplicable Optimizations for 8-Bit or 16-Bit Microcontrollers

         Example: Migrate from the 8051 to the ARM Cortex-M0

Chapter 22 Cortex-M0 Products

    Overview

    Microcontroller Products and Application-Specific Standard Products (ASSPs)

         NXP Cortex-M0 Microcontrollers

         NuMicro™ Microcontroller Family

         Mocha-1 ARM Cortex-M0 Configurable Array

         Melfas MCS™-7000 Series Touch Screen Controllers

    Compilers and Software Development Suites

         Keil Microcontroller Development Kit (MDK)

         TASKING VX-Toolset for ARM

         IAR Embedded Workbench for ARM

         CrossWorks for ARM

         Red Suite

         LabView C Code Generator

    Development Boards

         LPCXpresso

         IAR KickStart Kit for LPC1114

         LPC1114 Cortex-M0 Stamp Module

         Keil Cortex-M0 Boards

Appendix A: Instruction Set Summary

Appendix B: Cortex-M0 Exception Type Quick Reference

Appendix C: CMSIS Quick Reference

Appendix D: NVIC, SCB, and SysTick Registers Quick Reference

Appendix E: Debug Registers Quick Reference

Appendix F: Debug Connector Arrangement

Appendix G: Linker Script for CodeSourcery G++ Lite

Appendix H: Example Code Files

Appendix I: Troubleshooting

Index






 
 
Save up to 25% on all Books
Shop with Confidence

Free Shipping around the world
▪ Broad range of products
▪ 30 days return policy
FAQ

Contact Us