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Cache Memory Book, The
2nd Edition - January 13, 1998
Author: Jim Handy
Language: English
Hardback ISBN:9780123229809
9 7 8 - 0 - 1 2 - 3 2 2 9 8 0 - 9
The Second Edition of The Cache Memory Book introduces systems designers to the concepts behind cache design. The book teaches the basic cache concepts and more exotic techni…Read more
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The Second Edition of The Cache Memory Book introduces systems designers to the concepts behind cache design. The book teaches the basic cache concepts and more exotic techniques. It leads readers through someof the most intricate protocols used in complex multiprocessor caches. Written in an accessible, informal style, this text demystifies cache memory design by translating cache concepts and jargon into practical methodologies and real-life examples. It also provides adequate detail to serve as a reference book for ongoing work in cache memory design. The Second Edition includes an updated and expanded glossary of cache memory terms and buzzwords. The book provides new real world applications of cache memory design and a new chapter on cache"tricks".
Illustrates detailed example designs of caches
Provides numerous examples in the form of block diagrams, timing waveforms, state tables, and code traces
Defines and discusses more than 240 cache specific buzzwords, comparing in detail the relative merits of different design methodologies
Includes an extensive glossary, complete with clear definitions, synonyms, and references to the appropriate text discussions
Practitioners in the field of computer design, including system design engineers and memory design specialists. Also intended as a supplementary textbook for graduate level computer architecture courses.
What is Cache Memory? How are Caches Designed? Cache Memories and RISC Processors. Maintaining Coherency in Cached Systems. Cute Cache Tricks. Subject Index.
No. of pages: 256
Language: English
Edition: 2
Published: January 13, 1998
Imprint: Morgan Kaufmann
Hardback ISBN: 9780123229809
JH
Jim Handy
Jim Handy is a Principal Analyst for memories in Dataquest's Semiconductor group. He is a frequent lecturer and writer on the subject of cache memorydesign and is a patent holder in the cache design field.