Yogesh Singh Chauhan

Yogesh Singh Chauhan

Yogesh S. Chauhan is an assistant professor in EE department at Indian Institute of Technology Kanpur, India. He received Ph.D. degree in compact modeling of high voltage MOSFETs in 2007 from EPFL Switzerland. During 2007-2010, he was manager in IBM Bangalore where he led compact modeling team focusing on RF bulk and SOI transistors and ESD modeling team. During 2010-2012, he was postdoctoral fellow at University of California Berkeley, where he worked on development of bulk and multigate transistor models including BSIM6, BSIM-IMG and BSIM-CMG. He received IBM faculty award in 2013 for his contribution in compact modeling. He has co-authored over 50 conference and journal publications in the field of device compact modeling.

Affiliations and Expertise

Assistant Professor, Department of Electrical Engineering, Indian Institute of Technology (IIT) Kanpur, India